1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a semiconductor device and a method for fabricating such a semiconductor apparatus in which a gate electrode is formed buried in a surface of a substrate.
2. Description of Related Art
A related semiconductor device and a method for fabricating the same will be explained with reference to the attached drawings. FIGS. 1axcx9c1h illustrate sections showing the steps of a related art method for fabricating a semiconductor device.
Referring to FIG. 1a, the related art method for fabricating a semiconductor device starts with forming a pad oxide film 2 and a nitride layer 3 on a semiconductor substrate 1 in succession. A photoresist 4 is coated on the nitride layer 3. Then, as shown in FIG. 1b, the photoresist layer 4 formed on the nitride layer 3 is selectively patterned to leave a photoresist layer pattern 4a only on an active region. As shown in FIG. 1c, the photoresist layer pattern 4a is used as a mask to selectively etch the exposed nitride layer 3 and the pad oxide film 2. Then, the photoresist layer pattern 4a is removed, and the thusly patterned nitride layer 3a and the pad oxide film 2a are used as masks in etching a device isolation region in the semiconductor substrate 1, to form trenches 5 (see FIG. 1c). As shown in FIG. 1d, an insulating material layer 6 is formed on an entire surface of etched semiconductor substrate 1, including the trenches 5. As shown in FIG. 1e, the insulating material layer 6 is subjected to CMP (Chemical Mechanical Polishing) up to top of the trenches 5, to form device isolation layers 7. The tops of device isolation layers 7 are at the same height as the top surface of the semiconductor substrate 1. As shown in FIG. 1f, a gate oxide film 8 is formed over the surface of the etched semiconductor substrate 1 including the device isolation layers 7, and a gate material, i.e., polysilicon layer 9, is deposited on gate oxide film 8. A refractory metal layer, such as a tungsten layer, is deposited on the polysilicon layer 9 and is subjected to a silicidation process, to form a tungsten silicide layer 10. An HLD (High Temperature Low Pressure Deposition) layer 11, and a nitride cap layer 12 are deposited in succession on the tungsten silicide layer 10. As shown in FIG. 1g, the layers stacked on the gate oxide film 8 are selectively etched to form gate electrodes 13. Impurities are lightly implanted adjacent to electrodes 13 to form source/drain regions 15. As shown in FIG. 1h, a sidewall material layer, such as a nitride film, is deposited over an entire surface of the structure and is etched back to leave a gate sidewall 14 on sides of each of the gate electrodes 13. The gate electrodes 13 (including the gate sidewalls 14) are used as masks when heavily injecting impurities to further form source/drain regions 15 as shown in FIG. 14. However, because the related art semiconductor device fabricated by the aforementioned process has a planar channel region formed beneath the gate, problems such as short channel effect and punch through caused by line width reduction as the devices are densely packed occur.
Thus, the related art semiconductor device has the following problems.
The reduction of a gate line width makes the channel region susceptible to short channel effect and punch through which deteriorates device performance. The miniaturization of devices, including reduction of the gate line width, reduces a contact allowance in a subsequent bit line contact process, which makes both the fabrication process and assurance of reproducibility difficult.
Accordingly, the present invention is directed to a semiconductor device and a method for fabricating the same that substantially obviates one or more of the above-discussed problems due to limitations and disadvantages of the related art.
Additional features and advantages of the invention are set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by, for example, the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and described herein, a semiconductor device according to the present invention includes device isolation layers buried in a device isolation region of a semiconductor substrate for defining an active region, first gate trenches each with a generally square section formed in a surface of the active region, and second gate trenches each with an elliptical section formed in continuation with the first gate trenches. A gate oxide film is formed on surfaces of the first and second gate trenches, and gate electrodes are buried in the first and second trenches having the gate oxide film formed thereon. Source/drain regions are formed in surfaces of the semiconductor substrate on both sides of the gate electrodes insulated from the gate electrodes by the gate oxide film.
In another aspect of the present invention, a method for fabricating a semiconductor device according to the present invention includes (1) forming device isolation layers in device isolation regions of a semiconductor substrate, to define an active region, (2) forming a buffer oxide film and a nitride layer over the semiconductor substrate having the device isolation layers formed therein, and selectively etching these layers to expose portions of the semiconductor substrate, (3) using the patterned nitride layer as a mask to etch the exposed semiconductor substrate to form first gate trenches, (4) forming first gate trench sidewalls on sides of the first gate trenches, and further etching the exposed semiconductor substrate, to form second gate trenches as continuations of the first gate trenches, (5) forming a gate oxide film on surfaces of the first and second gate trenches and depositing and planarizing a gate material layer to fill the first and second gate trenches completely, thereby forming gate electrodes, and (6) forming an insulating layer on an entire surface, forming lightly doped impurity regions in surfaces of the semiconductor substrate on both sides of the gate electrodes to a first depth, and forming heavily doped impurity regions by heavily injecting impurities again to a second depth.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.